eaiovnaovbqoebvqoeavibavo PK PK PK #endif /* _ASM_X86_SIGCONTEXT32_H */ PK #define FP_XSTATE_MAGIC1 0x46505853U #define FP_XSTATE_MAGIC2 0x46505845U #define FP_XSTATE_MAGIC2_SIZE sizeof(FP_XSTATE_MAGIC2) /* * Bytes 464..511 in the current 512-byte layout of the FXSAVE/FXRSTOR frame * are reserved for SW usage. On CPUs supporting XSAVE/XRSTOR, these bytes are * used to extend the fpstate pointer in the sigcontext, which now includes the * extended state information along with fpstate information. * * If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then there's a * sw_reserved.extended_size bytes large extended context area present. (The * last 32-bit word of this extended area (at the * fpstate+extended_size-FP_XSTATE_MAGIC2_SIZE address) is set to * FP_XSTATE_MAGIC2 so that you can sanity check your size calculations.) * * This extended area typically grows with newer CPUs that have larger and * larger XSAVE areas. */ struct _fpx_sw_bytes { /* * If set to FP_XSTATE_MAGIC1 then this is an xstate context. * 0 if a legacy frame. */ __u32 magic1; /* * Total size of the fpstate area: * * - if magic1 == 0 then it's sizeof(struct _fpstate) * - if magic1 == FP_XSTATE_MAGIC1 then it's sizeof(struct _xstate) * plus extensions (if any) */ __u32 extended_size; /* * Feature bit mask (including FP/SSE/extended state) that is present * in the memory layout: */ __u64 xfeatures; /* * Actual XSAVE state size, based on the xfeatures saved in the layout. * 'extended_size' is greater than 'xstate_size': */ __u32 xstate_size; /* For future use: */ __u32 padding[7]; }; /* * As documented in the iBCS2 standard: * * The first part of "struct _fpstate" is just the normal i387 hardware setup, * the extra "status" word is used to save the coprocessor status word before * entering the handler. * * The FPU state data structure has had to grow to accommodate the extended FPU * state required by the Streaming SIMD Extensions. There is no documented * standard to accomplish this at the moment. */ /* 10-byte legacy floating point register: */ struct _fpreg { __u16 significand[4]; __u16 exponent; }; /* 16-byte floating point register: */ struct _fpxreg { __u16 significand[4]; __u16 exponent; __u16 padding[3]; }; /* 16-byte XMM register: */ struct _xmmreg { __u32 element[4]; }; #define X86_FXSR_MAGIC 0x0000 /* * The 32-bit FPU frame: */ struct _fpstate_32 { /* Legacy FPU environment: */ __u32 cw; __u32 sw; __u32 tag; __u32 ipoff; __u32 cssel; __u32 dataoff; __u32 datasel; struct _fpreg _st[8]; __u16 status; __u16 magic; /* 0xffff: regular FPU data only */ /* 0x0000: FXSR FPU data */ /* FXSR FPU environment */ __u32 _fxsr_env[6]; /* FXSR FPU env is ignored */ __u32 mxcsr; __u32 reserved; struct _fpxreg _fxsr_st[8]; /* FXSR FPU reg data is ignored */ struct _xmmreg _xmm[8]; /* First 8 XMM registers */ union { __u32 padding1[44]; /* Second 8 XMM registers plus padding */ __u32 padding[44]; /* Alias name for old user-space */ }; union { __u32 padding2[12]; struct _fpx_sw_bytes sw_reserved; /* Potential extended state is encoded here */ }; }; /* * The 64-bit FPU frame. (FXSAVE format and later) * * Note1: If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then the structure is * larger: 'struct _xstate'. Note that 'struct _xstate' embedds * 'struct _fpstate' so that you can always assume the _fpstate portion * exists so that you can check the magic value. * * Note2: Reserved fields may someday contain valuable data. Always * save/restore them when you change signal frames. */ struct _fpstate_64 { __u16 cwd; __u16 swd; /* Note this is not the same as the 32-bit/x87/FSAVE twd: */ __u16 twd; __u16 fop; __u64 rip; __u64 rdp; __u32 mxcsr; __u32 mxcsr_mask; __u32 st_space[32]; /* 8x FP registers, 16 bytes each */ __u32 xmm_space[64]; /* 16x XMM registers, 16 bytes each */ __u32 reserved2[12]; union { __u32 reserved3[12]; struct _fpx_sw_bytes sw_reserved; /* Potential extended state is encoded here */ }; }; #ifdef __i386__ # define _fpstate _fpstate_32 #else # define _fpstate _fpstate_64 #endif struct _header { __u64 xfeatures; __u64 reserved1[2]; __u64 reserved2[5]; }; struct _ymmh_state { /* 16x YMM registers, 16 bytes each: */ __u32 ymmh_space[64]; }; /* * Extended state pointed to by sigcontext::fpstate. * * In addition to the fpstate, information encoded in _xstate::xstate_hdr * indicates the presence of other extended state information supported * by the CPU and kernel: */ struct _xstate { struct _fpstate fpstate; struct _header xstate_hdr; struct _ymmh_state ymmh; /* New processor state extensions go here: */ }; /* * The 32-bit signal frame: */ struct sigcontext_32 { __u16 gs, __gsh; __u16 fs, __fsh; __u16 es, __esh; __u16 ds, __dsh; __u32 di; __u32 si; __u32 bp; __u32 sp; __u32 bx; __u32 dx; __u32 cx; __u32 ax; __u32 trapno; __u32 err; __u32 ip; __u16 cs, __csh; __u32 flags; __u32 sp_at_signal; __u16 ss, __ssh; /* * fpstate is really (struct _fpstate *) or (struct _xstate *) * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end * of extended memory layout. See comments at the definition of * (struct _fpx_sw_bytes) */ __u32 fpstate; /* Zero when no FPU/extended context */ __u32 oldmask; __u32 cr2; }; /* * The 64-bit signal frame: */ struct sigcontext_64 { __u64 r8; __u64 r9; __u64 r10; __u64 r11; __u64 r12; __u64 r13; __u64 r14; __u64 r15; __u64 di; __u64 si; __u64 bp; __u64 bx; __u64 dx; __u64 ax; __u64 cx; __u64 sp; __u64 ip; __u64 flags; __u16 cs; __u16 gs; __u16 fs; __u16 ss; __u64 err; __u64 trapno; __u64 oldmask; __u64 cr2; /* * fpstate is really (struct _fpstate *) or (struct _xstate *) * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end * of extended memory layout. See comments at the definition of * (struct _fpx_sw_bytes) */ __u64 fpstate; /* Zero when no FPU/extended context */ __u64 reserved1[8]; }; /* * Create the real 'struct sigcontext' type: */ /* * The old user-space sigcontext definition, just in case user-space still * relies on it. The kernel definition (in asm/sigcontext.h) has unified * field names but otherwise the same layout. */ #define _fpstate_ia32 _fpstate_32 #define sigcontext_ia32 sigcontext_32 # ifdef __i386__ struct sigcontext { __u16 gs, __gsh; __u16 fs, __fsh; __u16 es, __esh; __u16 ds, __dsh; __u32 edi; __u32 esi; __u32 ebp; __u32 esp; __u32 ebx; __u32 edx; __u32 ecx; __u32 eax; __u32 trapno; __u32 err; __u32 eip; __u16 cs, __csh; __u32 eflags; __u32 esp_at_signal; __u16 ss, __ssh; struct _fpstate *fpstate; __u32 oldmask; __u32 cr2; }; # else /* __x86_64__: */ struct sigcontext { __u64 r8; __u64 r9; __u64 r10; __u64 r11; __u64 r12; __u64 r13; __u64 r14; __u64 r15; __u64 rdi; __u64 rsi; __u64 rbp; __u64 rbx; __u64 rdx; __u64 rax; __u64 rcx; __u64 rsp; __u64 rip; __u64 eflags; /* RFLAGS */ __u16 cs; /* * Prior to 2.5.64 ("[PATCH] x86-64 updates for 2.5.64-bk3"), * Linux saved and restored fs and gs in these slots. This * was counterproductive, as fsbase and gsbase were never * saved, so arch_prctl was presumably unreliable. * * These slots should never be reused without extreme caution: * * - Some DOSEMU versions stash fs and gs in these slots manually, * thus overwriting anything the kernel expects to be preserved * in these slots. * * - If these slots are ever needed for any other purpose, * there is some risk that very old 64-bit binaries could get * confused. I doubt that many such binaries still work, * though, since the same patch in 2.5.64 also removed the * 64-bit set_thread_area syscall, so it appears that there * is no TLS API beyond modify_ldt that works in both pre- * and post-2.5.64 kernels. * * If the kernel ever adds explicit fs, gs, fsbase, and gsbase * save/restore, it will most likely need to be opt-in and use * different context slots. */ __u16 gs; __u16 fs; union { __u16 ss; /* If UC_SIGCONTEXT_SS */ __u16 __pad0; /* Alias name for old (!UC_SIGCONTEXT_SS) user-space */ }; __u64 err; __u64 trapno; __u64 oldmask; __u64 cr2; struct _fpstate *fpstate; /* Zero when no FPU context */ # ifdef __ILP32__ __u32 __fpstate_pad; # endif __u64 reserved1[8]; }; # endif /* __x86_64__ */ #endif /* _ASM_X86_SIGCONTEXT_H */ PK #endif /* _ASM_X86_TYPES_H */ PK PK #include /* Avoid too many header ordering problems. */ struct siginfo; /* Here we must cater to libcs that poke about in kernel headers. */ #define NSIG 32 typedef unsigned long sigset_t; #endif /* __ASSEMBLY__ */ #define SIGHUP 1 #define SIGINT 2 #define SIGQUIT 3 #define SIGILL 4 #define SIGTRAP 5 #define SIGABRT 6 #define SIGIOT 6 #define SIGBUS 7 #define SIGFPE 8 #define SIGKILL 9 #define SIGUSR1 10 #define SIGSEGV 11 #define SIGUSR2 12 #define SIGPIPE 13 #define SIGALRM 14 #define SIGTERM 15 #define SIGSTKFLT 16 #define SIGCHLD 17 #define SIGCONT 18 #define SIGSTOP 19 #define SIGTSTP 20 #define SIGTTIN 21 #define SIGTTOU 22 #define SIGURG 23 #define SIGXCPU 24 #define SIGXFSZ 25 #define SIGVTALRM 26 #define SIGPROF 27 #define SIGWINCH 28 #define SIGIO 29 #define SIGPOLL SIGIO /* #define SIGLOST 29 */ #define SIGPWR 30 #define SIGSYS 31 #define SIGUNUSED 31 /* These should not be considered constants from userland. */ #define SIGRTMIN 32 #define SIGRTMAX _NSIG /* * SA_FLAGS values: * * SA_ONSTACK indicates that a registered stack_t will be used. * SA_RESTART flag to get restarting signals (which were the default long ago) * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. * SA_RESETHAND clears the handler when the signal is delivered. * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. * SA_NODEFER prevents the current signal from being masked in the handler. * * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single * Unix names RESETHAND and NODEFER respectively. */ #define SA_NOCLDSTOP 0x00000001u #define SA_NOCLDWAIT 0x00000002u #define SA_SIGINFO 0x00000004u #define SA_ONSTACK 0x08000000u #define SA_RESTART 0x10000000u #define SA_NODEFER 0x40000000u #define SA_RESETHAND 0x80000000u #define SA_NOMASK SA_NODEFER #define SA_ONESHOT SA_RESETHAND #define SA_RESTORER 0x04000000 #define MINSIGSTKSZ 2048 #define SIGSTKSZ 8192 #include #ifndef __ASSEMBLY__ /* Here we must cater to libcs that poke about in kernel headers. */ #ifdef __i386__ struct sigaction { union { __sighandler_t _sa_handler; void (*_sa_sigaction)(int, struct siginfo *, void *); } _u; sigset_t sa_mask; unsigned long sa_flags; void (*sa_restorer)(void); }; #define sa_handler _u._sa_handler #define sa_sigaction _u._sa_sigaction #else /* __i386__ */ struct sigaction { __sighandler_t sa_handler; unsigned long sa_flags; __sigrestore_t sa_restorer; sigset_t sa_mask; /* mask last for extensibility */ }; #endif /* !__i386__ */ typedef struct sigaltstack { void *ss_sp; int ss_flags; size_t ss_size; } stack_t; #endif /* __ASSEMBLY__ */ #endif /* _ASM_X86_SIGNAL_H */ PK #include #define X86_IOC_RDMSR_REGS _IOWR('c', 0xA0, __u32[8]) #define X86_IOC_WRMSR_REGS _IOWR('c', 0xA1, __u32[8]) #endif /* __ASSEMBLY__ */ #endif /* _ASM_X86_MSR_H */ PK #endif #endif /* _ASM_X86_PTRACE_ABI_H */ PK #endif /* _ASM_X86_BYTEORDER_H */ PK #endif /* _ASM_X86_SIGINFO_H */ PK #else /* * The shmid64_ds structure for x86 architecture with x32 ABI. * * On x86-32 and x86-64 we can just use the generic definition, but * x32 uses the same binary layout as x86_64, which is differnet * from other 32-bit architectures. */ struct shmid64_ds { struct ipc64_perm shm_perm; /* operation perms */ size_t shm_segsz; /* size of segment (bytes) */ __kernel_time_t shm_atime; /* last attach time */ __kernel_time_t shm_dtime; /* last detach time */ __kernel_time_t shm_ctime; /* last change time */ __kernel_pid_t shm_cpid; /* pid of creator */ __kernel_pid_t shm_lpid; /* pid of last operator */ __kernel_ulong_t shm_nattch; /* no. of current attaches */ __kernel_ulong_t __unused4; __kernel_ulong_t __unused5; }; struct shminfo64 { __kernel_ulong_t shmmax; __kernel_ulong_t shmmin; __kernel_ulong_t shmmni; __kernel_ulong_t shmseg; __kernel_ulong_t shmall; __kernel_ulong_t __unused1; __kernel_ulong_t __unused2; __kernel_ulong_t __unused3; __kernel_ulong_t __unused4; }; #endif #endif /* __ASM_X86_SHMBUF_H */ PK #endif /* __ASM_X86_BITSPERLONG_H */ PK PK #include /* * Fields are zero when not available. Also, this struct is shared with * userspace mcelog and thus must keep existing fields at current offsets. * Only add new fields to the end of the structure */ struct mce { __u64 status; /* Bank's MCi_STATUS MSR */ __u64 misc; /* Bank's MCi_MISC MSR */ __u64 addr; /* Bank's MCi_ADDR MSR */ __u64 mcgstatus; /* Machine Check Global Status MSR */ __u64 ip; /* Instruction Pointer when the error happened */ __u64 tsc; /* CPU time stamp counter */ __u64 time; /* Wall time_t when error was detected */ __u8 cpuvendor; /* Kernel's X86_VENDOR enum */ __u8 inject_flags; /* Software inject flags */ __u8 severity; /* Error severity */ __u8 pad; __u32 cpuid; /* CPUID 1 EAX */ __u8 cs; /* Code segment */ __u8 bank; /* Machine check bank reporting the error */ __u8 cpu; /* CPU number; obsoleted by extcpu */ __u8 finished; /* Entry is valid */ __u32 extcpu; /* Linux CPU number that detected the error */ __u32 socketid; /* CPU socket ID */ __u32 apicid; /* CPU initial APIC ID */ __u64 mcgcap; /* MCGCAP MSR: machine check capabilities of CPU */ __u64 synd; /* MCA_SYND MSR: only valid on SMCA systems */ __u64 ipid; /* MCA_IPID MSR: only valid on SMCA systems */ __u64 ppin; /* Protected Processor Inventory Number */ __u32 microcode; /* Microcode revision */ }; #define MCE_GET_RECORD_LEN _IOR('M', 1, int) #define MCE_GET_LOG_LEN _IOR('M', 2, int) #define MCE_GETCLEAR_FLAGS _IOR('M', 3, int) #endif /* _ASM_X86_MCE_H */ PK static __inline__ __u32 __arch_swab32(__u32 val) { __asm__("bswapl %0" : "=r" (val) : "0" (val)); return val; } #define __arch_swab32 __arch_swab32 static __inline__ __u64 __arch_swab64(__u64 val) { #ifdef __i386__ union { struct { __u32 a; __u32 b; } s; __u64 u; } v; v.u = val; __asm__("bswapl %0 ; bswapl %1 ; xchgl %0,%1" : "=r" (v.s.a), "=r" (v.s.b) : "0" (v.s.a), "1" (v.s.b)); return v.u; #else /* __i386__ */ __asm__("bswapq %0" : "=r" (val) : "0" (val)); return val; #endif } #define __arch_swab64 __arch_swab64 #endif /* _ASM_X86_SWAB_H */ PK #include #ifndef __ASSEMBLY__ #ifdef __i386__ /* this struct defines the way the registers are stored on the stack during a system call. */ struct pt_regs { long ebx; long ecx; long edx; long esi; long edi; long ebp; long eax; int xds; int xes; int xfs; int xgs; long orig_eax; long eip; int xcs; long eflags; long esp; int xss; }; #else /* __i386__ */ struct pt_regs { /* * C ABI says these regs are callee-preserved. They aren't saved on kernel entry * unless syscall needs a complete, fully filled "struct pt_regs". */ unsigned long r15; unsigned long r14; unsigned long r13; unsigned long r12; unsigned long rbp; unsigned long rbx; /* These regs are callee-clobbered. Always saved on kernel entry. */ unsigned long r11; unsigned long r10; unsigned long r9; unsigned long r8; unsigned long rax; unsigned long rcx; unsigned long rdx; unsigned long rsi; unsigned long rdi; /* * On syscall entry, this is syscall#. On CPU exception, this is error code. * On hw interrupt, it's IRQ number: */ unsigned long orig_rax; /* Return frame for iretq */ unsigned long rip; unsigned long cs; unsigned long eflags; unsigned long rsp; unsigned long ss; /* top of stack page */ }; #endif /* !__i386__ */ #endif /* !__ASSEMBLY__ */ #endif /* _ASM_X86_PTRACE_H */ PK PK #endif /* _ASM_X86_POSIX_TYPES_64_H */ PKvm_flags * value and turn them in to the bits that we can put in * to a pte. * * Only override these if Protection Keys are available * (which is only on 64-bit). */ #define arch_vm_get_page_prot(vm_flags) __pgprot( \ ((vm_flags) & VM_PKEY_BIT0 ? _PAGE_PKEY_BIT0 : 0) | \ ((vm_flags) & VM_PKEY_BIT1 ? _PAGE_PKEY_BIT1 : 0) | \ ((vm_flags) & VM_PKEY_BIT2 ? _PAGE_PKEY_BIT2 : 0) | \ ((vm_flags) & VM_PKEY_BIT3 ? _PAGE_PKEY_BIT3 : 0)) #define arch_calc_vm_prot_bits(prot, key) ( \ ((key) & 0x1 ? VM_PKEY_BIT0 : 0) | \ ((key) & 0x2 ? VM_PKEY_BIT1 : 0) | \ ((key) & 0x4 ? VM_PKEY_BIT2 : 0) | \ ((key) & 0x8 ? VM_PKEY_BIT3 : 0)) #endif #include #endif /* _ASM_X86_MMAN_H */ PK #include #include #include #include #include